Tezzaron is also expected to announce what the company claims is the world's first re-programmable 3D RAM chip. The device, to be marketed and sold by Tezzaron, has been tested at clock rates higher than 500-MHz with less than 2-ns latencies.

The device is based on a 3D wafer-stacking technology from Tezzaron (Naperville, Ill.), a fabless chip design house. The RAM device, along with future 3D chips from Tezzaron, will be manufactured on a foundry basis by MagnaChip (Seoul, South Korea).

The 3D RAM is currently being made in a standard 0.18-micron foundry process, said Jeong-Gun Lee, senior vice president of research and development at newly-formed MagnaChip. MagnaChip is the former non-memory chip unit of South Korea's Hynix Semiconductor Inc. The non-memory chip unit of Hynix was recently sold to a newly-created South Korean company formed by Citigroup Venture Capital Equity Partners LP and CVC Asia Pacific Ltd. (see Oct. 5 story).

Initially, MagnaChip built a RAM-based register file on a foundry basis for Tezzaron. "It's a relatively primitive device," said Robert Patti, chief technology officer for Tezzaron. "But we believe that this will usher in a new era of semiconductors."

Tezzaron itself plans to develop and sell a range of 3D "custom devices," Patti said. 3D chips hold great promise in terms of speed, density, and low power requirements for cellular phones, handheld devices and other products, he told Silicon Strategies..

Others are also rushing to develop and ship 3D chips. MagnaChip, for one, dropped hints about developing 3D parts. "Our main interest is to develop process technology for 3D ICs," Lee said. "We are also interested in doing 3D sensors."

Earlier this month, Matrix Semiconductor Inc. (Santa Clara, Calif.), a developer of 3D semiconductor memory, said it has migrated its multi-layer, antifuse-based ROM from 0.25-micron manufacturing process to a 0.15-micron process.

Matrix has been shipping an eight-layer antifuse-based 512-Mbit PROM made using a 0.25-micron manufacturing process for about one year. The company added that it has shipped one million units of 3D memory in fewer than four months of mass production (see Nov. 8 story).

Stack the decks

Tezzaron claims that it takes another approach to 3D design. The company's FaStack technology builds 3D chips by stacking whole semiconductor wafers and bonding them with copper to create connections between the circuitry layers. The current process aligns 8-inch wafers with a precision of less than a micron, enabling an extremely high density of inter-wafer connections.

The wafer stacks are then diced into separate chips, each of which is a fully integrated 3D IC. The process can be extended to multiple wafers. Because each added wafer is thinned to a mere ten microns, as many as 32 layers could fit into standard chip packaging.

The company's re-programmable RAM device was built as a 3D IC -- two layers of circuitry with vertical interconnects that allow them to behave as a single device. This technology is expected to perform 3 to 10 times better than existing chips due to the small vertical interconnects, only 10 microns in length, according to the company.

MagnaChip built Tezzaron's RAM design on standard "bulk" semiconductor wafers and supplied additional processing as needed. The companies intend to continue their association in creating additional 3D devices, said James Ayers, Jr., chairman and CEO of Tezzaron. "In addition to the 3D RAM, our product roadmap includes many other commercial 3D devices that will be announced as FaStack ramps toward volume production," he said.

Youm Huh, president and CEO of MagnaChip, is also bullish on 3D chips. "3D RAM is expected to become one of the fastest growing IC segments, led by growth in digital camera applications, cell phones and portable consumer electronics," he said. "The benefits to manufacturers include increased performance, lower cost of ownership, faster time to market and better product performance."